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Thursday, October 29 • 07:30 - 08:00
Trap-less Virtual Interrupt for KVM on RISC-V - Siqi Zhao, Huawei

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Virtual interrupt is an integral part in virtualization. However, so far the handling of virtual interrupt always involve traps to the host with the exception only in the case of passthrough devices. For example, interrupts from the timer, the virtual device and between virtual CPUs still need the host software to inject. This situation incurs non-negligible overhead in interrupt-intensive scenarios. A design that eliminates most of the traps to host for handling interrupts is presented. The solution includes a new virtualization-aware interrupt controller and the accompanying software implementation in KVM. With this design, delivery of the above interrupts on longer involve traps to the host, improving performance. The interrupt controller design has been implemented on an emulated RISC-V platform due to its simplicity in design and potential for pioneering new virtualization ideas.


Siqi Zhao

Senior Engineer, Huawei Technologies Co., Ltd
Siqi Zhao is a Senior Engineer currently in Huawei Technologies Co., Ltd. He is working on the ongoing next generation virtualization project. Before joining Huawei, he had spoken in conferences such as Usenix Security and Euro S&P during his Ph.D. studies.

Thursday October 29, 2020 07:30 - 08:00 GMT
KVM Theater
  KVM Track 1